1. Field of the Invention
This invention relates to a patching facility for unalterable memories of the type used in electronic computers and processors. More particularly, the invention relates to a memory patching facility which furnishes good output information whenever an attempt is made to access word locations containing defective or invalid information in an unalterable memory.
2. Description of the Prior Art
It is known to use unalterable read only memories (ROMs) in processors, computers, and other such applications requiring the storage of permanent type information. Although ROMs, in particular semiconductor ROMs, are efficient unalterable information storage devices, their use presents problems whenever it becomes necessary to change the stored information. For example, a machine using a ROM may be manufactured, tested, delivered, installed in service, and perform satisfactorily for an extended period of time. A machine malfunction may subsequently occur due to defective program information in the ROM. This defective information may be due either to a subtle defect in the program as originally written; or it may be a newly developed defect within the ROM device.
In view of the above, it is a common problem for program errors to be discovered in ROM controlled machines and for the owner of the machine to be faced with the problem of promptly correcting the error to minimize the machine downtime.
This problem could be easily solved if the realities of semiconductor ROM technology and economics were of no concern. Conceivably, the problem could be solved by replacing the defective ROM with a new ROM programmed with the correct information. However, this solution is neither feasible nor economical. First of all, the typical semiconductor ROM can only be programmed at the factory with the programming comprising a portion of the manufacturing process. Consequently, a machine user cannot promptly obtain a newly programmed ROM. Instead he must contact the ROM manufacturer, give the manufacturer the corrected program information, and then wait for the manufacturer to produce and deliver the new ROM. Also, because the ROM programming is done by the manufacturer on a customized basis, a manufacturer cannot economically produce one or two new ROMs for a single customer. ROM's are economical only when fabricated in reasonably large quantities. For these reasons, the downtime of a machine cannot normally be minimized by replacing a defective ROM with a new one having corrected program information.
Field programmable ROMs (PROMs) are commercially available for immediate delivery. Conceivably, an installed machine having a defective ROM could be returned to service by programming a PROM with good information, and by then replacing the defective ROM with the newly programmed PROM. This would be technically feasible, but economically unsatisfactory, for most applications. The reason for this is that PROM devices are approximately ten times the cost of comparable ROMs. This expedient might be satisfactory, in spite of the economic penalty, in installations where the cost of the PROM is low compared to the cost to the user of the down condition of the machine. However, many installations could not tolerate the cost penalty. For example, a telephone company or a computer manufacturer having thousands of machines in service possibly could not afford the mass replacement of defective ROMs with PROMs costing ten times as much.
Attempts have been made in the prior art to solve the problem of defective information in unalterable memories. Most of the prior art solutions require the use of equipment that is complicated and expensive, such as the provision of a fully duplicated memory system. One prior art arrangement comprises a decoder which detects the receipt of each memory address word specifying a defective ROM location, generates a control signal to inhibit the output of the defective ROM, and activates an alterable auxiliary memory which then supplies valid program information. A system of this type is shown in U.S. Pat. No. 3,638,194 issued on Jan. 25, 1972 to Matushita et al.
Matushita uses a diode matrix array as the auxiliary memory. This memory can be field programmed by inserting diodes into sockets of the matrix crosspoints required to generate the new program information. The Matushita system may be suitable for use in application where space is not at a premium and where the ROM is of limited capacity. However, it is unsuitable with present state of the art systems using integrated circuits including ROMs and other such devices of the postage stamp size where space is at a premium. Also, the Matushita arrangement would be costly for use with a large capacity ROM since the auxiliary memory presumably would have to have the same bit capacity as the defective ROM. In this case it would merely comprise another duplicated memory arrangement.
It is therefore, a problem to maintain program controlled machines in service when program defects are discovered in the ROMs of such machines.